Yiyang Yuan

Yiyang Yuan (袁易扬) is currently a Postdoctoral Researcher in the FACT Lab within the Department of Electronic and Computer Engineering at HKUST, working under the supervision of Prof. Yuan Xie. His research focuses on Computing-in-Memory, RISC-V, AI Accelerator, and Embodied Intelligence.

He received the B.S. degree in Electronic Information Engineering from Beijing Institute of Technology, Beijing, China, in 2021, and the Ph.D. degree in Microelectronics and Solid State Electronics from the Institute of Microelectronics, Chinese Academy of Sciences, Beijing, China, in 2025. During his doctoral research, supervised by Prof. Feng Zhang, he focused on SRAM-based Computing-in-Memory circuits and systems design for energy-efficient edge AI applications.

He has published 10 papers in leading venues including ISSCC, JSSC, and TCAS, with 5 first-author publications in JSSC and ISSCC. He received the National Scholarship and the Chinese Academy of Sciences President’s Scholarship in 2025. He also serves as a reviewer for leading IEEE journals including JSSC, TCAS, and TVLSI.