Dstc: Dual-side sparsity tensor core for dnns acceleration on modern gpu architectures January 1, 2024· Chen Zhang , Yang Wang , Zhiqiang Xie , Cong Guo , Yunxin Liu , Jingwen Leng , Guangyu Sun , Zhigang Ji , Runsheng Wang Yuan Xie , others · 0 min read Cite Type Journal article Publication IEEE Transactions on Computers publications Last updated on January 1, 2024 Authors Yuan Xie Chair Professor Fang Professor of Engineering | Chair Professor | IEEE/ACM/AAAS Fellow ← A Tightly Coupled AI-ISP Vision Processor January 1, 2024 Enabling efficient sparse multiplications on GPUs with heuristic adaptability January 1, 2024 →