JC STEM Lab of Future Advanced Computing Technologies

賽馬會「未來先進計算技術」創科實驗室

Research Areas

Computer Architecture

CPU micro-Architecture, GPU micro-Architecture, FPGA, Tensor Core, Domain Specific Accelerator, etc.

Artificial Intelligence

Machine Learning, Large Language Model (LLM), Quantization and Compression, Sparsity, Number-formats, AI-assisted design automation, etc.

VLSI & Design Automation

3D-IC, Process-in-Memory (PIM), Chiplet, Serdes, Interposers, Advanced Packaging Methods, EDA Softwares, Hardware Abstraction, etc.

Recent Publications
Jianbo Dong, Bin Luo, Jun Zhang, Pengcheng Zhang, Fei Feng, Yikai Zhu, Ang Liu, Zian Chen, Yi Shi, Hairong Jiao, Others (2025). Enhancing Large-Scale AI Training Efficiency: The C4 Solution for Real-Time Anomaly Detection and Communication Optimization. 2025 IEEE International Symposium on High Performance Computer Architecture (HPCA).
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Cong Li, Yihan Yin, Xintong Wu, Jingchen Zhu, Zhutianya Gao, Dimin Niu, Qiang Wu, Xin Si, Yuan Xie, Chen Zhang, Others (2025). H2-LLM: Hardware-Dataflow Co-Exploration for Heterogeneous Hybrid-Bonding-based Low-Batch LLM Inference. Proceedings of the 52nd Annual International Symposium on Computer Architecture.
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Ling Liang, Zhen Gu, Fahong Zhang, Zhaohui Chen, Zhirui Li, Xin Fan, Dimin Niu, Meng LI, Zhiyong Li, Zongwei Wang, Others (2025). Matrix: Multi-Cipher Structures Dataflow for Parallel and Pipelined TFHE Accelerator. ACM Transactions on Architecture and Code Optimization.
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Tianchan Guan, Yijin Guan, Zhaoyang Du, Jiacheng Ma, Boyu Tian, Zhao Wang, Teng Ma, Zheng Liu, Yang Kong, Yuan Xie, Others (2025). MemTunnel: a CXL-based Rack-Scale Host Memory Pooling Architecture for Cloud Service. IEEE Transactions on Parallel and Distributed Systems.
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Yiquan Chen, Zhen Jin, Yijing Wang, Yi Chen, Jiexiong Xu, Hao Yu, Jinlong Chen, Wenhai Lin, Kanghua Fang, Keyao Zhang, Others (2025). NVMePass: A Lightweight, High-performance and Scalable NVMe Virtualization Architecture with I/O Queues Passthrough. 2025 IEEE International Symposium on High Performance Computer Architecture (HPCA).
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Zhaohui Yang, Dawen Ding, Chenghong Zhu, Jianxin Chen, Yuan Xie (2025). Phoenix: Pauli-based High-level Optimization Engine for Instruction Execution on NISQ devices. Design Automation Conference.
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Jiayi Huang, Yanhua Chen, Zhe Wang, Christopher J Hughes, Yufei Ding, Yuan Xie (2025). Push Multicast: A Speculative and Coherent Interconnect for Mitigating Manycore CPU Communication Bottleneck. 2025 IEEE International Symposium on High Performance Computer Architecture (HPCA).
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Hongyi Wang, Zhenhua Zhu, Tianchen Zhao, Yunfei Xiang, Zehao Wang, Jincheng Yu, Huazhong Yang, Yuan Xie, Yu Wang (2025). REACT3D: Real-time Edge Accelerator for Incremental Training in 3D Gaussian Splatting based SLAM Systems. Proceedings of the 58th IEEE/ACM International Symposium on Microarchitecture®.
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Guyue Huang, Hao Li, Le Qin, Jiayi Huang, Yangwook Kang, Yufei Ding, Yuan Xie (2025). TRACI: Network Acceleration of Input-Dynamic Communication for Large-Scale Deep Learning Recommendation Model. Proceedings of the 52nd Annual International Symposium on Computer Architecture.
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Tongxin Xie, Zhenhua Zhu, Bing Li, Yukai He, Cong Li, Guangyu Sun, Huazhong Yang, Yuan Xie, Yu Wang (2025). UniNDP: A Unified Compilation and Simulation Tool for Near DRAM Processing Architectures. 2025 IEEE International Symposium on High Performance Computer Architecture (HPCA).
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Recent News

FACT Lab Celebrates Professor Yuan Xie's 2025 CCF Overseas Science and Technology Award

FACT lab is pleased to announce that Professor Yuan Xie has been awarded the 2025 “CCF Overseas Science and Technology Award” by the China Computer Federation (CCF). This prestigious award recognizes his outstanding contributions to integrated circuit chip design, computer architecture, and electronic design automation. Professor Xie’s work in translating research into industrial applications and nurturing talent through educational initiatives has significantly advanced the field of computer science in China.

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